Staff ASIC Layout Engineer
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Job Description
Staff ASIC Layout Engineer creating high-quality layouts working with circuit designers. Joining Optical Networks division in the AI-driven data center era.
Responsibilities:
- Work closely with circuit designers to optimize the floor plan;
- Perform daily layout editing, DRC/LVS tasks to ensure the quality of the layout;
- Employ efficient design methodologies to reduce the number of iterations and promptly deliver the product.
Requirements:
- Extremely familiar with layout editing tools, such as Virtuoso and Laker;
- Highly proficient with DRC/LVS/ERC related tools and flows, such as Calibre, PVS (or IC Validator);
- Decent understanding in the issues of electro-migration and IR drop, RC delay, self-heating, capacitive cross-talk, etc.;
- Decent understanding in analog layout requirements, such as matching and shielding;
- Has extensive experience in the layout of low-power, high-resolution circuits, such as SD-ADC, SAR-ADC, bandgap, and regulators.
- Knowledge in automatic P&R or chip-level floor planning/integration.
- Decent Understanding of analog design methodologies, including the use of layout constraints;
- Knowledge in performing RC extraction and EM/IR analysis;
- Excellent communication skills and team spirit to work with members across multiple sites and functionalities;
- Experience in designing layouts for high-resolution, high-performance analog / mixed-signal circuits.
- BS degree or Associated degree.
- Have more than 10 years’ experience in analog/mixed signal layout design.
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