IP Design Verification Engineer
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Job Description
IP Design Verification Engineer ensuring complex IP logic designs meet specifications for Intel’s advanced IP solutions. Responsibilities include functional verification, documentation, and collaboration with design teams.
Responsibilities:
- Perform functional verification of IP logic to ensure the design meets specification requirements
- Develop comprehensive IP verification plans, test benches, and verification environments
- Execute verification plans and run system simulation models to analyze timing, power, and design behavior
- Identify, reproduce, and debug issues in the presilicon environment
- Implement corrective actions to resolve failing tests and improve overall verification quality
- Collaborate closely with architects, RTL developers, and physical design teams on design and verification improvements
- Document test plans and actively participate in technical reviews with design and architecture teams
- Maintain and enhance existing functional verification infrastructure and methodologies
- Contribute to defining verification infrastructure and TFMs required for functional design verification.
Requirements:
- 8+ years of experience as a Verification Engineer
- Strong expertise with Specman “e” / System Verilog language
- PCIe expertise is a strong advantage
- Solid understanding of verification methodologies, simulation models, and debugging techniques
- Experience working with architecture, RTL, and physical design teams
- Ability to drive quality improvements, document verification processes, and contribute to technical reviews.
Benefits:
- Flexible working hours
- Professional development opportunities
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