Staff ASIC Digital Engineer
Posted 22hrs ago
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Job Description
Principal STA Engineer leading ASIC timing signoff and closure for Sandisk’s flash-memory and semiconductor products. Developing timing methodologies, automation, and cross-functional design solutions in India.
Responsibilities:
- Own complete STA signoff for ASIC designs and provide direction to the PnR team for timing closure and synthesis report analysis
- Work with IP and Design teams on timing constraint development and review
- Develop and implement advanced STA methodologies and strategies for complex IC designs
- Collaborate with design, verification, physical design, and DFT teams
- Develop and maintain STA scripts and tools to automate timing analysis
- Conduct timing analysis, identify critical paths, and mitigate timing violations
- Monitor STA industry trends and incorporate best practices
- Prepare and present timing reports and technical documentation
- Foster innovation, collaboration, and continuous improvement within the STA team
Requirements:
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
- Minimum 8 years of experience in Static Timing Analysis
- Proven track record of successfully executing STA and owning STA signoff
- Experience leading complete STA activities and guiding engineers to achieve STA closure
- In-depth knowledge of Synopsys PrimeTime, Cadence Tempus, Constraints Manager, and STA methodologies
- Strong understanding of digital design principles, physical design, and semiconductor fabrication processes
- Excellent problem-solving and strategic analytical abilities
- Strong communication and interpersonal skills for cross-functional collaboration
- Ability to prioritize tasks and manage multiple projects simultaneously
- Proactive, results-oriented mindset with passion for innovation and continuous improvement
- Experience with advanced process nodes such as 5nm and 3nm is highly desirable
Benefits:
- Remote work option
- Inclusive and diverse work environment
- Opportunities for applicants with disabilities and accommodation support











